HEF4518BT Ver la hoja de datos (PDF) - NXP Semiconductors.

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HEF4518BT

Dual BCD counter

NXP Semiconductors. 

Nexperia

HEF4518B

Dual BCD counter

6. Pinning information

6.1 Pinning

Fig 3. Pin configuration

+()%

&3 

&3 

4 

4 

4 

4 

05 

966 

 9''

 05

 4

 4

 4

 4

 &3

 &3

DDH

6.2 Pin description

Table 2. Pin description

Symbol

1CP0, 2CP0

1CP1, 2CP1

1Q0, 2Q0

1Q1, 2Q1

1Q2, 2Q2

1Q3, 2Q3

1MR, 2MR

VDD

VSS

Pin

1, 9

2, 10

3, 11

4, 12

5, 13

6, 14

7, 15

16

8

Description

clock input (LOW-to-HIGH triggered)

clock input (HIGH-to-LOW triggered)

output

output

output

output

master reset input

supply voltage

ground supply voltage

HEF4518B

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 8 — 19 April 2016

© Nexperia B.V. 2017. All rights reserved

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