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74HC377-Q100 Ver la hoja de datos (PDF) - NXP Semiconductors.

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74HC377-Q100 Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
Nexperia
74HC377-Q100; 74HCT377-Q100
Octal D-type flip-flop with data enable; positive-edge trigger
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Fig 8.
Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch
Test circuit for measuring switching times
Table 9. Test data
Type
Input
VI
tr, tf
74HC377-Q100
VCC
6 ns
74HCT377-Q100
3V
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 k
1 k
S1 position
tPHL, tPLH
open
open
74HC_HCT377
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 21 October 2013
© Nexperia B.V. 2017. All rights reserved
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