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FAN5236MTC

Dual Mobile-Friendly DDR / Dual-output PWM Controller

Fairchild Semiconductor 

FAN5236

PRODUCT SPECIFICATION

Hysteretic Mode

Conversely, the transition from Hysteretic mode to PWM

mode occurs when the SW node is negative for 8 consecutive

cycles.

A sudden increase in the output current will also cause a

change from hysteretic to PWM mode. This load increase

causes an instantaneous decrease in the output voltage due to

the voltage drop on the output capacitor ESR. If the load

causes the output voltage (as presented at VSNS) to drop

below the hysteretic regulation level (20mV below VREF),

the mode is changed to PWM on the next clock cycle.

In hysteretic mode, the PWM comparator and the error

amplifier that provide control in PWM mode are inhibited

and the hysteretic comparator is activated. In hysteretic

mode the low side MOSFET is operated as a synchronous

rectifier, where the voltage across ( VDS(ON) ) it is monitored,

and it is switched off when VDS(ON) goes positive (current

flowing back from the load) allowing the diode to block

reverse conduction.

The hysteretic comparator initiates a PFM signal to turn on

HDRV at the rising edge of the next oscillator clock, when

the output voltage (at VSNS) falls below the lower threshold

(10mV below VREF) and terminates the PFM signal when

VSNS rises over the higher threshold (5mV above VREF).

The switching frequency is primarily a function of:

1. Spread between the two hysteretic thresholds

2. ILOAD

3. Output Inductor and Capacitor ESR

A transition back to PWM (Continuous Conduction Mode or

CCM) mode occurs when the inductor current rises suffi-

ciently to stay positive for 8 consecutive cycles. This occurs

when:

ILOAD(CCM)

=

∆-----V----H----Y----S---T---E---R---E----S---I--S-

2 ESR

(3)

where ∆VHYSTERESIS = 15mV and ESR is the equivalent

series resistance of COUT.

Because of the different control mechanisms, the value of the

load current where transition into CCM operation takes place

is typically higher compared to the load level at which transi-

tion into hysteretic mode occurs. Hysteretic mode can be

disabled by setting the FPWM pin low.

VSEN

SS

CSS

300K

0.17pf

1.5M 17pf

4.14K

TO PWM COMP

S/H

V to I

in +

ISNS

ISNS

in –

Reference and

Soft Start

ILIM det.

I2 =

ILIM*11.2

2.5V

0.9V

ILIM

Figure 11. Current Limit / Summing Circuits

ISNS RSENSE

LDRV

PGND

ILIM

R ILIM

REV. 1.1.9 7/12/04

11

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