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1654

Dual 14-Bit Rail-to-Rail DAC in 16-Lead SSOP Package

Linear Technology 

LTC1654

U

OPERATIO

Table 1.

CONTROL

C3 C2 C1 C0

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

Load Input Register n

Update (Power-Up) DAC Register n

Load Input Register n, Update (Power-Up) All

Load and Update n

Power Down n

Fast n (Speed States are Maintained Even If DAC is

Put in Power-Down Mode)

Slow n (Default State is Slow When Supplies are

Powered Up)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

No Operation

ADDRESS (n)

A3 A2 A1 A0

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

DAC A

DAC B

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Reserved (Do Not Use)

Both DACs

INPUT WORD

CONTROL

ADDRESS

DATA (14 + 2 DON'T CARE LSBs)

C3 C2 C1 C0 A3 A2 A1 A0 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X

1654 TABLE

1654fb

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