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74AHC1G00

2-input NAND gate

Philips Electronics 

Philips Semiconductors

2-input NAND gate

AC WAVEFORMS

Product specification

74AHC1G00; 74AHCT1G00

handbook, halfpage

A, B input

Y output

VM

tPHL

VM

tPLH

MNA106

FAMILY

AHC1G

AHCT1G

VI INPUT

VM

VM

REQUIREMENTS INPUT OUTPUT

GND to VCC

GND to 3.0 V

50% VCC 50% VCC

1.5 V

50% VCC

Fig.5 The inputs (A and B) to output (Y) propagation delays.

handbook, halfpage

VI

PULSE

GENERATOR

VCC

VO

D.U.T.

RT

CL

MNA101

Definitions for test circuit:

CL = Load capacitance including jig and probe capacitance (see Chapter “AC characteristics”).

RT = Termination resistance should be equal to the output impedance Z0 of the pulse generator.

Fig.6 Load circuitry for switching times.

2002 May 27

9

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