7811 Ver la hoja de datos (PDF) - Analog Devices
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7811 Datasheet PDF : 20 Pages
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AD7811/AD7812
ABSOLUTE MAXIMUM RATINGS*
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Digital Input Voltage to DGND (CONVST, SCLK, RFS, TFS,
DIN, A0) . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
Digital Output Voltage to DGND (DOUT)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
REFIN to AGND . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
Analog Inputs
VIN1–VIN4 (AD7811) . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
VIN1–VIN8 (AD7812) . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . +105°C/W
Lead Temperature, (Soldering 10 sec) . . . . . . . . . . . +260°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 115°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 kV
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Model
AD7811YN
AD7811YR
AD7811YRU
AD7812YN
AD7812YR
AD7812YRU
Linearity
Error
± 1 LSB
± 1 LSB
± 1 LSB
± 1 LSB
± 1 LSB
± 1 LSB
ORDERING GUIDE
Package
Descriptions
16-Lead Plastic DIP
16-Lead Small Outline IC (SOIC)
16-Lead Thin Shrink Small Outline Package (TSSOP)
20-Lead Plastic DIP
20-Lead Small Outline IC (SOIC)
20-Lead Thin Shrink Small Outline Package (TSSOP)
Package
Options
N-16
R-16A
RU-16
N-20
R-20A
RU-20
–4–
REV. A
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