82C50A_06 Ver la hoja de datos (PDF) - Intersil

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82C50A_06

CMOS Asynchronous

Intersil 

82C50A

Timing Waveforms (Continued)

ADS

(2) tAS

A2, A1, A0

(4) tCS

CS2, CS1, CS0

CSOUT

DOSTR/DOSTR

(1)

tAW

VALID

VALID

(17)

tCSC†

(3) tAH

(5) tCH

(22) tWA†

(23)

tWCS†

(25)

tCSW†

(24)

tAW†

(12)

tDOW

ACTIVE

(14)

WC

(13)

tWC

DISTR/DISTR

DATA

D0-D7

† Applicable only when ADS is tied low.

(15) tDS

(16) tDH

VALID DATA

FIGURE 6. WRITE CYCLE

ADS

(2) tAS

A2, A1, A0

(4) tCS

CS2, CS1, CS0

CSOUT

DISTR/DISTR

(1)

tAW

VALID

VALID

(17)

tCSC†

(3) tAH

(5) tCH

(18) tRA†

(19)

tRCS†

(21)

tCSR†

(20)

tAR†

(6)

tDIW

ACTIVE

(8)

RC

(7)

tRC

DOSTR/DOSTR

DD/S

DATA

D0-D7

(9)

(9)

tDD

tDD

(10)

tDDD

(11) tHZ

VALID DATA

† Applicable only when ADS is tied low.

FIGURE 7. READ CYCLE

21

ACTIVE

OR

ACTIVE

ACTIVE

OR

ACTIVE

FN2958.5

August 24, 2006

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