AD74322DAR Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
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AD74322DAR Datasheet PDF : 20 Pages
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PRELIMINARY TECHNICAL DATA
AD74322
REG
ADDRESS
R/W RES
RESET
PURA
PUR
Power Control
PUD1 PUD0 PUA3 PUA2
15 - 12 11 10 9
8
7
6
5
4
3
0000
Software
Reset
Power
Up
Referen-
ce
Amplifi-
er
Power
Up
Referen-
ce
Power
Up
DAC1
Power
Up
DAC0
Power
Up
ADC3
Power
Up
ADC2
PUA1
2
Power
Up
ADC1
PUA0
1
Power
Up
ADC0
PU
0
Global
Power
Up
Table <MCLK_Divider>
REG
ADDRESS
R/W
RES
15 - 12 11 10
0000
RY Clock Dividers
INA Reserved
BCD2-0
IM AL 9
8
7
6
5
4
3
PRTEELCHDNAITCABit Clock Divider
Serial Interface Control
REG
ADDRESS
R/W
RES
DSTD-
ME
TPOS2
TPOS1
TPOS0
DDF1
DDF0
ADF1
MCD2-0
2
1
0
Master Clock Divider
ADF0 DSMM DSMS
15 - 12
0000
11 10 9
8
7
6
5
4
3
2
1
0
TDM
Mode
Enable
TDM
Mode
Position
2
TDM
Mode
Position
1
TDM
Mode
Position
0
DAC
Data
Format 2
DAC
Data
Format 2
ADC
Data
Format 2
ADC
Data
Format 1
Mixed--
Mode
Enable
Master/
Slave
Mode
Mute Control
REG
ADDRESS
R/W
RES
DWW1 DWW0
AWW1
AWW0
DMU-
TE1
DMU-
TE0
-
-
AMU- AMU-
TE1 TE0
15 - 12 11 10 9
8
7
6
5
4
3
2
1
0
0000
DAC
Word
Width 1
DAC
Word
Width 0
ADC
Word
Width 1
ADC
Word
Width 0
Mute
DAC 1
Mute
DAC 0
Reserved Reserved
Mute
ADC 1
Mute
ADC 0
Pr D 03/00
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