ADM4850AR Ver la hoja de datos (PDF) - Analog Devices
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ADM4850AR Datasheet PDF : 16 Pages
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ADM4850–ADM4857
CIRCUIT DESCRIPTION
The ADM4850–ADM4857 are high speed RS-485/RS-422
transceivers offering enhanced performance over industry-
standard devices. All devices in the family contain one driver
and one receiver, but offer a choice of performance options. The
devices feature true fail-safe operation, which means that a logic
high receiver output is guaranteed when the receiver inputs are
open-circuit or short-circuit, or when they are connected to a
terminated transmission line with all drivers disabled (see the
Fail-Safe Operation section).
SLEW-RATE CONTROL
The ADM4850/ADM4854 feature a controlled slew-rate driver
that minimizes electromagnetic interference (EMI) and reduces
reflections caused by incorrectly terminated cables, allowing
error-free data transmission rates up to 115 kbps. The ADM4851/
ADM4855 offer a higher limit on driver output slew rate, allowing
data transmission rates up to 500 kbps. The driver slew rates of
the ADM4852/ADM4856 and the ADM4853/ADM4857 are not
limited, offering data transmission rates up to 2.5 Mbps and
10 Mbps, respectively.
ADM4850/ADM4851/
ADM4852/ADM4853
RO
R
A
RE
DE
DI
D
B
A
B
RECEIVER INPUT FILTERING
The receivers of all the devices incorporate input hysteresis. In
addition, the receivers of the 115 kbps ADM4850/ADM485 and
the 500 kbps ADM4851/ADM4855 incorporate input filtering.
This enhances noise immunity with differential signals that have
very slow rise and fall times. However, it causes the propagation
delay to increase by 20%.
HALF-/FULL-DUPLEX OPERATION
Half-duplex operation implies that the transceiver can transmit
and receive, but it can only do one of these at any given time.
However, with full-duplex operation, the transceiver can
transmit and receive simultaneously. The ADM4850–ADM4853
are half-duplex devices in which the driver and receiver share
differential bus terminals. The ADM4854–ADM4857 are full-
duplex devices, which have dedicated driver output and receiver
input pins. Figure 26 and Figure 27 show typical half- and full-
duplex topologies.
A
B
ADM4850/ADM4851/
ADM4852/ADM4853
A
R
RO
RE
DE
B
D
DI
R
D
R
D
RO RE DE DI
RO RE DE DI
MAXIMUM NUMBER OF TRANSCEIVERS ON BUS: 256
Figure 26. Typical Half-Duplex RS-485 Network Topology
VDD
VDD
ADM4854/ADM4855/
ADM4856/ADM4857 A
RO
R
B
Z
DI
D
Y
ADM4854/ADM4855/
Z ADM4856/ADM4857
D
DI
Y
A
R
RO
B
GND
GND
Figure 27. Typical Full-Duplex Point-to-Point RS-485 Network Topology
Rev. 0 | Page 12 of 16
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