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AX88140A

Fast Ethernet MAC Controller

Unspecified 

AX88140A

PRELIMINARY

5.2 Receive Descriptors

The receive descriptor provides one buffer, one byte-count buffer, and one address pointer in

each descriptor. Descriptors and receive buffers addresses must be long-word aligned.

Receive Descriptor Format

31

O

RDES0

W

N

RDES1

Control bits

0

Status

Byte Count Buffer 2 Byte Count Buffer 1

RDES2

Buffer Address 1

RDES3

Buffer Address 2

Fig - 5 Receive Descriptor Format

5.2.1 Receive Descriptor 0 (RDES0)

RDES0 contains the received frame status, the frame length, and the descriptor ownership

information.

Field

31

30

29:16

15

14

13:12

11

Description

OWN - Own Bit

The AX88140A clears this bit either when it completes

the frame reception or

when the buffers that are associated with this descriptor

are full.

1 Indicates that the descriptor is owned by the

AX88140A

0 Indicates that the descriptor is owned by the host

FF - Filtering Fail

This bit can be set only when receive all (REG6<30>) is

set.

1 Indicates that the frame failed the address

recognition filtering

0 Indicates that the frame passed the address

recognition filtering

FL - Frame Length

Indicates the length in bytes of the received frame including the cyclic redundancy check (CRC).

This field is valid only when last descriptor (RDES0<8>) is set and descriptor error ( RDES0<14>) is reset.

ES - Error Summary

Indicates the logical OR of the following RDES0 bits :

This field is valid only when last descriptor (RDES0<8>) is set.

RDES0<1>

CRC error

RDES0<6>

collision seen

RDES0<7>

frame too long

RDES0<11>

runt frame

RDES0<14>

descriptor error

DE - Descriptor Error. The frame is truncated. Active high.

This field is valid only when last descriptor (RDES0<8>) is set.

Reserved.--Written as “0” for future compatibility concern.

RF - Runt Frame. Indicates that this frame is a runt frame. Active high.

This field is valid only when last descriptor (RDES0<8>) is set .

31

ASIX ELECTRONICS CORPORATION

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