CS8130 Ver la hoja de datos (PDF) - Unspecified

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CS8130

Multi-Standard Infrared Transceiver

Unspecified 

CS8130

Register 24, Receive ASK Timing Sensitivity Register

Register

Reset (R)

D3 D2 D1 D0

RAT3 RAT2 RAT1 RAT0

0000

BIT

NAME

VALUE

FUNCTION

RAT3-0

Receiver ASK

Timing Sensitivity.

Timing window =

+0.27 µs to

-RAT(2/3.6864E06)

- 0.27 µs

0000

0001

0010

↓

1111

0 R +0.27 µs to -0.27 µs window (500 kHz ASK mode)

1

+0.27 µs to -0.54 - 0.27 µs window

2

+0.27 µs to -1.08 - 0.27 µs window

↓

↓

15 +0.27 µs to -8.14 - 0.27 µs window

The timing window is relative to the modulation divider register nominal setting.

Register 28, CS8130 Silicon Revision Register

Register

D3 D2 D1 D0

REV3 REV2 REV1 REV0

BIT

REV3-0

NAME

CS8130 silicon

revision level

VALUE

0000

FUNCTION

1st silicon, designed to meet DS134PP2 data sheet,

dated June 1994

This register should be read by the CS8130 driver to allow CS8130 future enhancements to be recog-

nized, and incorporated into future versions of the driver.

DS134PP2

21

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