CY62146DV30LL-70ZSXI Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY62146DV30LL-70ZSXI Datasheet PDF : 11 Pages
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CY62146DV30
Capacitance (for all packages)[9]
Parameter
Description
CIN
COUT
Input Capacitance
Output Capacitance
Thermal Resistance[9]
Test Conditions
TA = 25°C, f = 1 MHz,
VCC = VCC(typ)
Max.
Unit
10
pF
10
pF
Parameter
ΘJA
ΘJC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
Still Air, soldered on a 3 × 4.5 inch, four-layer
printed circuit board
BGA TSOP II Unit
72
75.13 °C/W
8.86
8.95 °C/W
AC Test Loads and Waveforms[10]
R1
VCC
OUTPUT
50 pF
ALL INPUT PULSES
VCC
GND
10%
90%
90%
10%
R2 Rise Time = 1 V/ns
Fall Time = 1 V/ns
INCLUDING
JIG AND
SCOPE
Equivalent to: THÉVENIN EQUIVALENT
OUTPUT
RTH
V
Parameters
R1
R2
RTH
VTH
2.50V
16667
15385
8000
1.20
Data Retention Characteristics (Over the Operating Range)
3.0V
1103
1554
645
1.75
Parameter
Description
Conditions
VDR
ICCDR
tCDR[9]
tR[11]
VCC for Data Retention
Data Retention Current
VCC= 1.5V
L
CE > VCC – 0.2V,
LL
VIN > VCC – 0.2V or VIN < 0.2V
Chip Deselect to Data Retention Time
Operation Recovery Time
Data Retention Waveform
Unit
Ω
Ω
Ω
V
Min.
1.5
Typ.[5]
Max.
9
6
Unit
V
µA
0
ns
tRC
ns
DATA RETENTION MODE
VCC
VCC(min)
VDR > 1.5 V
VCC(min)
tCDR
tR
CE
Notes:
9. Tested initially and after any design or process changes that may affect these parameters.
10. Test condition for the 45 ns part is a load capacitance of 30 pF.
11. Full device operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) > 100 µs.
Document #: 38-05339 Rev. *A
Page 4 of 11
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