HEF4050BT(2016) Ver la hoja de datos (PDF) - NXP Semiconductors.
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HEF4050BT Datasheet PDF : 12 Pages
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Nexperia
HEF4050B
Hex non-inverting buffers
Table 8. Dynamic power dissipation PD
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol Parameter
VDD
Typical formula for PD (W)
where:
PD
dynamic power 5 V
PD = 3800 fi + (fo CL) VDD2
fi = input frequency in MHz,
dissipation
10 V
PD = 11600 fi + (fo CL) VDD2
fo = output frequency in MHz,
15 V
PD = 65900 fi + (fo CL) VDD2
CL = output load capacitance in pF,
VDD = supply voltage in V,
(fo CL) = sum of the outputs.
12. Waveforms
9,
LQSXW
9
WU
90
W3/+
92+
RXWSXW
92/
90
W7/+
WI
W3+/
W7+/
DDL
Fig 5.
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Input to output propagation delays
Table 9.
Input
VM
0.5VDD
Measurement points
VI
0 V to VDD
Output
VM
0.5VDD
HEF4050B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 23 June 2016
© Nexperia B.V. 2017. All rights reserved
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