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ISP1181

Full-speed Universal Serial Bus interface device

Philips Electronics 

Philips Semiconductors

ISP1181

Full-speed USB interface

In DACK-only mode the ISP1181 uses the DACK signal as data strobe. Input signals

RD and WR are ignored. This mode is used in CPU systems that have a single

address space for memory and I/O access. Such systems have no separate MEMW

and MEMR signals: the RD and WR signals are also used as memory data strobes.

idth

ISP1181

DREQ

DACK

AD,

DATA1 to DATA15

RAM

DMA

CONTROLLER

DREQ

DACK

RD

WR

HRQ

HLDA

Fig 4. ISP1181 in DACK-only DMA mode.

CPU

HRQ

HLDA

MGS779

10.4 End-Of-Transfer conditions

10.4.1 Bulk endpoints

A DMA transfer to/from a bulk endpoint can be terminated by any of the following

conditions (bit names refer to the DMA Configuration Register, see Table 26):

• An external End-Of-Transfer signal occurs on input EOT

• The internal DMA Counter Register reaches zero (CNTREN = 1)

• A short/empty packet is received on an enabled OUT endpoint (SHORTP = 1)

• DMA operation is disabled by clearing bit DMAEN.

External EOT: When reading from an OUT endpoint, an external EOT will stop the

DMA operation and clear any remaining data in the current FIFO. For a double-

buffered endpoint the other (inactive) buffer is not affected.

When writing to an IN endpoint, an EOT will stop the DMA operation and the data

packet in the FIFO (even if it is smaller than the maximum packet size) will be sent to

the USB host at the next IN token.

DMA Counter Register zero: An EOT from the DMA Counter Register is enabled by

setting bit CNTREN in the DMA Configuration Register. The ISP1181 has a 16-bit

DMA Counter Register, which specifies the number of bytes to be transferred. When

DMA is enabled (DMAEN = 1), the internal DMA counter is loaded with the value from

the DMA Counter Register. When the internal counter reaches zero an EOT condition

is generated and the DMA operation stops.

Short/empty packet: Normally, the transfer byte count must be set via a control

endpoint before any DMA transfer takes place. When a short/empty packet has been

enabled as EOT indicator (SHORTP = 1), the transfer size is determined by the

presence of a short/empty packet in the data. This mechanism permits the use of a

fully autonomous data transfer protocol.

9397 750 06896

Objective specification

Rev. 01 — 13 March 2000

© Philips Electronics N.V. 2000. All rights reserved.

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