IS41C16100S Ver la hoja de datos (PDF) - Integrated Circuit Solution Inc

Número de pieza

componentes Descripción

Lista de partido

IS41C16100S

1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

Integrated Circuit Solution Inc 

IS41C16100S

IS41LV16100S

ELECTRICAL CHARACTERISTICS(1)

(Recommended Operating Conditions unless otherwise noted.)

Symbol Parameter

Test Condition

Speed Min. Max. Unit

IIL

Input Leakage Current

Any input 0V < VIN < Vcc

Other inputs not under test = 0V

–5 5 µA

IIO

Output Leakage Current

Output is disabled (Hi-Z)

0V < VOUT < Vcc

–5 5 µA

VOH

Output High Voltage Level

IOH = –5.0 mA (5V)

IOH = –2.0 mA (3.3V)

2.4 — V

VOL

Output Low Voltage Level

IOL = 4.2 mA (5V)

— 0.4 V

IOL = 2.0 mA (3.3V)

ICC1

Standby Current: TTL

RAS, LCAS, UCAS ≥ VIH Commerical 5V

—

2 mA

3.3V —

1

Extended 5V —

3 mA

3.3V —

2

ICC2

Standby Current: CMOS

RAS, LCAS, UCAS ≥ VCC – 0.2V

5V —

1 mA

3.3V — 0.5

ICC3

Operating Current:

Random Read/Write(2,3,4)

RAS, LCAS, UCAS,

Address Cycling, tRC = tRC (min.)

-45 — 190 mA

-50 — 160

Average Power Supply Current

-60 — 145

ICC4

Operating Current:

EDO Page Mode(2,3,4)

RAS = VIL, LCAS, UCAS,

Cycling tPC = tPC (min.)

-45 — 100 mA

-50 — 90

Average Power Supply Current

-60 — 80

ICC5

Refresh Current:

RAS-Only(2,3)

RAS Cycling, LCAS, UCAS ≥ VIH

tRC = tRC (min.)

-45 — 180 mA

-50 — 160

Average Power Supply Current

-60 — 145

ICC6

Refresh Current:

CBR(2,3,5)

RAS, LCAS, UCAS Cycling

tRC = tRC (min.)

-45 — 180 mA

-50 — 160

Average Power Supply Current

-60 — 145

ICCS

Self Refresh Current

Self Refresh mode

— — 300 µA

Notes:

1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device

operation is assured. The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded.

2. Dependent on cycle rates.

3. Specified values are obtained with minimum cycle time and the output open.

4. Column-address is changed once each EDO page cycle.

5. Enables on-chip refresh and address counters.

6. Iccs is sampled only not 100% tested.

6

Integrated Circuit Solution Inc.

DR004-0B

Share Link: