IS61LV6464 Ver la hoja de datos (PDF) - Integrated Silicon Solution

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IS61LV6464

64K x 64 SYNCHRONOUS PIPELINE STATIC RAM

Integrated Silicon Solution 

IS61LV6464

CAPACITANCE(1,2)

Symbol

CIN

COUT

Parameter

Input Capacitance

Input/Output Capacitance

Conditions

VIN = 0V

VOUT = 0V

Max.

Unit

5

pF

7

pF

Notes:

1. Tested initially and after any design or process changes that may affect these parameters.

2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.3V.

AC TEST CONDITIONS

Parameter

Input Pulse Level for Input Pins

Input Pulse Level for I/O Pins

Input Rise and Fall Times

Input and Output Timing

and Reference Level

Output Load

Unit

0V to 3.0V

0V to 2.5V

1.5 ns

1.25V

See Figures 1 and 2

ISSI ®

AC TEST LOADS

ZO = 50Ω

Output

Buffer

30 pF

Figure 1

50Ω

1.25V

2.5V

317 Ω

OUTPUT

5 pF

Including

jig and

scope

Figure 2

351 Ω

8

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

04/17/01

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