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LTC3442EDE-TRPBF Ver la hoja de datos (PDF) - Linear Technology

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LTC3442EDE-TRPBF Datasheet PDF : 20 Pages
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LTC3442
OPERATION
The LTC3442 provides high efficiency, low noise power
for applications such as portable instrumentation. The
LTC proprietary topology allows input voltages above,
below or equal to the output voltage by properly phasing
the output switches. The error amp output voltage on VC
determines the output duty cycle of the switches. Since VC
is a filtered signal, it provides rejection of frequencies from
well below the switching frequency. The low RDS(ON), low
gate charge synchronous switches provide high frequency
pulse width modulation control at high efficiency. Schottky
diodes across the synchronous switch D and synchronous
switch B are not required, but provide a lower voltage
drop during the break-before-make time (typically 15ns).
Schottky diodes will improve peak efficiency by typically
1% to 2%. High efficiency is achieved at light loads when
Burst Mode operation is entered and the IC’s quiescent
current drops to a low 35µA.
LOW NOISE FIXED FREQUENCY OPERATION
Oscillator
The frequency of operation is programmed by an external
resistor from RT to ground, according to the following
equation:
f (kHz )
=
43,300
RT(k)
Error Amp
The error amplifier is a voltage mode amplifier. The loop
compensation components are configured around the
amplifier (from FB to VC) to obtain stability of the converter.
For improved bandwidth, an additional RC feedforward
network can be placed across the upper feedback divider
resistor. The voltage on SHDN/SS clamps the error amp
output, VC, to provide a soft-start function.
Internal Current Limit
There are three different current limit circuits in the
LTC3442. Two have internally fixed thresholds which vary
inversely with VIN, the third is externally programmable,
and does not vary with input voltage.
The first circuit is a high speed peak current limit amplifier
that will shut off switch A if the current exceeds 5A typi-
cal. The delay to output of this amplifier is typically 50ns.
A second amplifier will begin to source current into the FB
pin to drop the output voltage once the peak input current
exceeds 3A typical. This method provides a closed loop
means of clamping the input current. During conditions
where VOUT is near ground, such as during a short-circuit
or during startup, this threshold is cut in half, providing a
foldback feature. For this current limit feature to be most
effective, the Thevenin resistance from FB to ground should
be greater than 100kΩ.
Externally Programmable Current Limit
The third current limit circuit is programmed by an external
resistor on RLIM. This circuit works by mirroring the input
current in switch A, averaging it by means of the external
RC network on RLIM, and comparing the resulting voltage
with an internal reference. If the voltage on RLIM starts
to exceed 0.95V, a Gm amplifier will clamp VC, lowering
VOUT to maintain control of the input current. This allows
the user to program a maximum average input current, for
applications such as USB, where the current draw from the
bus must be limited to 500mA. The resistor and capacitor
values are determined by the following equations:
( ) RLIM(k)
=
70

0.86
+
2 VIN
40
IIN( AM PS)
VOUT

CLIM(µF )
0.1
RLIM(k)
The programmable current limit feature is disabled in
Burst Mode operation.
3442fb
8
For more information www.linear.com/LTC3442

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