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7641

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Mitsumi 

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MITSUBISHI MICROCOMPUTERS

7641 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

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Table 38 Read / Write mode (CE control)

Symbol

tWC

tAS

tAH

tDS

tDH

tCS

tCH

tWP

tWPH

tDAP

tDAE

tWHRL

tPS

Write cycle time

Address set up time

Address hold time

Data set up time

Data hold time

______

WE set up time

______

WE hold time

_____

CE pulse width

_____

“H” CE pulse width

Program time

Erase all blocks time

_____

RY/BY delay time

_____

RP recovery time

Parameter

Limits

Unit

Min.

Typ.

Max.

167

ns

83.3

ns

20.8

ns

83.3

ns

20.8

ns

0

ns

0

ns

83.3

ns

41.7

ns

25

1000

µs

1.5

20

s

167

ns

10

µs

Note : The read timing parameter in the command write operation mode is the same as that of the read-only mode.

Typical value is at VCC = 5.0 V, Ta = 25 °C condition.

Table 39 Erase and program operation

Parameter

Min.

Erase all blocks time

Block erase time

Program time (1byte)

Typ.

1.5

1.0

25

Max.

Unit

s

s

µs

Table 40 VCC power up / power down timing

Symbol

tVCS

Parameter

_____

RP = VIH set up time

(after rised VCC = VCC min.)

Min.

Typ.

Max.

Unit

10

µs

Note : Miserase or miswrite may happen, in case of noise pulse due to the power supply on or off is input to the control pins. Therefore disableing the

write mode is need for preventing memory data from breaking at the power supply on or off. 10µs (min.) waiting time is need to initiate read or write

_____

operation after VCC rises to VCC min. at power supply on. The memory data is protected owing to keep the RP pin VIL level at power supply off. The

_____

_____

RP pin must be kept VIL level for 10µs (min.) after VCC rises to VCC min. at the power supply on. The RP pin must be kept VIL level until the VCC

_____

_____

falls to the GND level at power supply off. RP pin doesn’t have latch mode, so that RP pin must be kept VIH level during read, erase and program

operation.

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