PSB4860 Ver la hoja de datos (PDF) - Siemens AG

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PSB4860

Digital Answering Machine with Full Duplex Speakerphone SAM EC

Siemens AG 

PSB 4860

1.3

Pin Definitions and Functions

Overview

Table 1 Pin Definitions and Functions

Pin No. Symbol Dir. Reset Function

P-MQFP-80

41, 80

VDDP

-

-

Power supply (5V ±10 %)

Power supply for the interface.

7, 15, 21, VDD

-

-

29, 39, 49,

58, 61, 67,

73

Power supply (3.0 V - 3.6 V)

Power supply for logic.

1

VDDA

-

-

Power supply (3.0 V - 3.6 V)

Power supply for clock generator.

4

VSSA

-

-

Power supply (0 V)

Ground for clock generator.

9, 16, 22, VSS

30, 40, 48,

57, 59, 60,

78, 66, 72

-

-

Power supply (0 V)

Ground for logic and interface.

17

AFEFS O L

Analog Frontend Frame Sync:

8 kHz frame synchronization signal for the

analog front end.

18

AFECLK O L

Analog Frontend Clock:

Clock signal for the analog front end.

19

AFEDD O L

Analog Frontend Data Downstream:

Data output to the analog frontend.

20

AFEDU I

-

Analog Frontend Data Upstream:

Data input from the analog frontend.

79

RST

I

-

Reset:

Active high reset signal.

23

FSC

I

-

Data Frame Synchronization:

8 kHz frame synchronization signal (IOM®-2 and

SSDI mode).

24

DCL

I

-

Data Clock:

Data Clock of the serial data interface.

Semiconductor Group

14

10.97

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