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SL74HCT00

Quad 2-Input NAND Gate High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HCT00

AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V ± 10%, CL=50pF, Input tr=tf=6.0 ns)

Symbol

Parameter

tPLH, tPHL

tTLH, tTHL

CIN

Maximum Propagation Delay, Input A or B to

Output Y (Figures 1 and 2)

Maximum Output Transition Time, Any Output

(Figures 1 and 2)

Maximum Input Capacitance

Guaranteed Limits

25 °C to

-55°C

≤85°C ≤125°C Unit

19

24

28

ns

15

19

22

ns

10

10

10

pF

Power Dissipation Capacitance (Per Gate)

Typical @25°C,VCC=5.0 V

CPD Used to determine the no-load dynamic power

15

pF

consumption:

PD=CPDVCC2f+ICCVCC

Figure 1. Switching Waveforms

Figure 2. Test Circuit

EXPANDED LOGIC DIAGRAM

(1/4 of the Device)

SLS

System Logic

Semiconductor

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