GS880E36T-80I Ver la hoja de datos (PDF) - Giga Semiconductor

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GS880E36T-80I

512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs

Giga Semiconductor 

Flow Through Read Cycle Timing

Preliminary

GS880E18/32/36T-11/11.5/100/80/66

CK

ADSP

ADSC

ADV

A0–An

GW

BW

Single Read

tS tH

tKH

Burst Read

tKL

tKC ADSP is blocked by E inactive

tS tH

ADSC initiated read

tS tH

Suspend Burst

Suspend Burst

tS tH

RD1

tS

RD2

RD3

tH

tS

tH

BA–BD

E1

E2

E3

G

DQA–DQD

tS tH

E1 masks ADSP

tS tH

tS tH

E2 and E3 only sampled with ADSP or ADSC

tOE tOHZ

tOLZ

tKQX

Hi-Z

Q1A

Q2A Q2B

Q2C

Q2D

tLZ

tKQ

Deselected with E2

tKQX

Q3A

tHZ

Rev: 1.11 11/2000

18/25

© 2000, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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