GS1500 Ver la hoja de datos (PDF) - Gennum -> Semtech
Número de pieza
componentes Descripción
Lista de partido
GS1500 Datasheet PDF : 17 Pages
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PIN DESCRIPTIONS (Continued)
NUMBER
SYMBOL
TIMING
27
ANC_DATA_C
Synchronous
wrt PCLK_IN
28, 29, 30, 31
VD_STD[3:0]
Synchronous
wrt PCLK_IN
32
LINE_CRC_ERR_C Synchronous
wrt PCLK_IN
33
LINE_CRC_ERR_Y Synchronous
wrt PCLK_IN
34
FIFO_L
Synchronous
wrt PCLK_IN
35
TN
36
OEN
Non-
synchronous
52, 49, 48, 45,
44, 43, 42, 41,
40, 39
DATA_OUT[9:0]
(CHROMA
channel)
Synchronous
wrt PCLK_IN
64, 63, 62, 61,
60, 57, 56, 55,
54, 53
65
DATA_OUT[19:10]
(LUMA channel)
LN_ERR
Synchronous
wrt PCLK_IN
Synchronous
wrt PCLK_IN
TYPE
DESCRIPTION
Output
Control Signal Output. This signal indicates the position of the
embedded ANC data in the outgoing CHROMA (DATA_OUT[9:0])
data stream. ANC_DATA_C goes high for the entire time that an
ANC_DATA packet is present in the CHROMA (DATA_OUT[9:0])
data stream whether it be in the active video area or the HANC
area. Refer to Fig. 17 for timing of ANC_DATA_C relative to
CHROMA (DATA_OUT[9:0]). During detection of ANC data, any
errors in the data count (DC) packet will consequently cause errors
in the duration of the flags. Bit errors in an ANC header will prevent
the packet from being detected.
Output
Control Signal Output. VD_STD[3:0] indicates which input video
standard the device has detected. The GS1500 will indicate all of
the formats in SMPTE292M (see Table 3) plus it will indicate an
unknown interlace or progressive scan format.
Output
Status Signal Output. Indicates a difference in the calculated versus
embedded CRC in the CHROMA channel. When LINE_CRC_ERR_C
is high, it indicates that the GS1500 has detected a difference
between the line based CRCs it calculates for the CHROMA
channel and the line based CRCs embedded within the CHROMA
channel. When LINE_CRC_ERR_C is low, the embedded and
calculated CRC's match. Refer to Fig. 19 for timing information of
LINE_CRC_ERR_C.
Output
Status Signal Output. Indicates a difference in the calculated versus
embedded CRC in the LUMA channel. When LINE_CRC_ERR_Y is
high, it indicates that the GS1500 has detected a difference
between the line based CRCs it calculates for the LUMA channel
and the line based CRCs embedded within the LUMA channel.
When LINE_CRC_ERR_Y is low, the embedded and calculated
CRC's match. Refer to Fig. 19 for timing information of
LINE_CRC_ERR_Y.
Output
Control Signal Output. Used to control an external FIFO(s). FIFO_L
is normally high, but is set low for the EAV or SAV word depending
on the state of F_E/S. Refer to Fig. 4 for timing information of FIFO_L
relative to LUMA (DATA_OUT[19:10]) and CHROMA
(DATA_OUT[9:0]).
TEST
Test Pin. Used for test purposes only. This pin must be connected to
VDD for normal operation
Input
Control Signal Input. Used to enable the DATA_OUT[19:0] output
bus or set it in a high Z state. When OEN is low, the LUMA
(DATA_OUT[19:10]) and CHROMA (DATA_OUT [9:0]) busses are
enabled. When OEN is high, these busses are in a high Z state.
Output
CHROMA Output Data Bus. DATA_OUT [9] is CHROMA_OUT[9]
which is the MSB of the CHROMA output signal (pin 52). DATA_OUT
[0] is CHROMA_OUT[0] which is the LSB of the CHROMA output
signal (pin 39).
Output
LUMA Output Data Bus. DATA_OUT [19] is LUMA_OUT[9] which is
the MSB of the LUMA output signal. (pin 64) DATA_OUT [10] is
LUMA_OUT[0] which is the LSB of the LUMA output signal (pin 53).
Output
Status Signal Output. Used to indicate a Line Number error or a
mismatch between the embedded line number and the flywheel line
number when the flywheel is enabled. When LN_ERR is high, a line
number error is detected or the internal flywheel indicates
mismatching line numbers. Refer to Fig. 3 for timing information of
LN_ERR relative to LUMA (DATA_OUT[19:10]) and CHROMA
(DATA_OUT [9:0]) Since LN_ERR depends on the sequence of line
numbers, a line number error will actually cause LN_ERR to go high
for two lines.
6
GENNUM CORPORATION
522 - 33 - 01
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