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V53C316405AT60

3.3 VOLT 4M x 4 EDO PAGE MODE CMOS DYNAMIC RAM

Mosel Vitelic, Corp 

MOSEL VITELIC

V53C316405A

DC and Operating Characteristics (1-2)

TA = 0°C to 70°C, VCC = 3.3 V ± 0.3V, VSS = 0 V, VT = 2ns unless otherwise specified.

Symbol Parameter

Access

Time

V53C316405A

Min. Typ. Max. Unit Test Conditions Notes

ILI

Input Leakage Current

(any input pin)

–10

10

µA VSS ≤ VIN ≤ VCC+0.3V 1

ILO

Output Leakage Current

(for High-Z State)

ICC1

VCC Supply Current,

Operating

–10

50

60

10

µA VSS ≤ VOUT ≤

VCC+0.3V

RAS, CAS at VIH

50

mA tRC = tRC (min.)

40

1

2, 3, 4

ICC2

VCC Supply Current,

TTL Standby

ICC3

VCC Supply Current,

50

RAS-Only Refresh

60

2

mA RAS, CAS at VIH

other inputs ≥ VSS

50

mA tRC = tRC (min.)

2, 4

40

ICC4

VCC Supply Current,

50

EDO Page Mode Operation

60

35

mA Minimum Cycle

30

2, 3, 4

ICC5

VCC Supply Current,

50

during CAS-before-RAS Refresh

60

50

mA

2, 4

40

ICC6

VCC Supply Current,

CMOS Standby

VCC

Power Supply Voltage

VIL

Input Low Voltage

VIH

Input High Voltage

VOL

TTL Output Low Voltage

VOH

TTL Output High Voltage

VOL

CMOS Output Low Voltage

VOH

CMOS Output High Voltage

3.0

–0.5

2.0

2.4

1.0

mA RAS ≥ VCC – 0.2 V,

1

CAS ≥ VCC – 0.2 V,

other input pins ≥ VSS

3.3

3.6

V

0.8

V

1

VCC + 0.5 V

1

0.4

V IOL = 2 mA

1

V IOH = –2 mA

1

0.2

V IOL = 100 µA

1

VCC – 0.2 V IOH = –100 µA

1

V53C316405A Rev. 1.2 March 1998

4

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