SRK2000DTR(2012) Ver la hoja de datos (PDF) - STMicroelectronics

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SRK2000DTR
(Rev.:2012)

Synchronous rectifier smart driver for LLC resonant converters

STMicroelectronics 

SRK2000

Application information

5.1.2

1.8 V: if this threshold is exceeded the gate drivers GD1 and GD2 are enabled and the SR

MOSFET is operated; otherwise, the device stays in an idle condition and the SR MOSFET

in the off state.

Using the pull-up resistor RP, the voltage on the EN pin rises as IEN is switched off and tends

to Vcc, therefore exceeding VEN_On and enabling the operation of both SR MOSFETs.

Essentially, this results in enabling the gate-driving as Vcc exceeds VCCOn and disabling it

as Vcc falls below VCCOn. This configuration is thereby recommended when SR MOSFETs

are logic-level types.

Resistor divider configuration

To enable gate-driving with a Vcc voltage higher than a predefined value VCC_G, to properly

drive a standard SR MOSFET, the EN pin is biased by a resistor divider (R1 upper resistor,

R2 lower resistor) whose value is chosen so as to exceed VEN_On when Vcc = VCC_G and

also to set the desired VDVS1,2_Off level. Note that, with a falling Vcc, gate-driving is disabled

at a Vcc level about 2.5% lower than VCC_G, because of the 45 mV hysteresis of the

comparator.

The equations that describe the circuit in the two crucial conditions Vcc = VCCOn (when the

decision of the VDVS1,2_Off level is made) and Vcc = VCC_G (when gate-driving is to be

enabled) are respectively:

Figure 6. EN pin biased with a resistor divider to program the gate-drive UVLO

threshold VCC_G

Equation 1

⎪⎩⎪⎨⎧VVCCCCO_RGn 1−R1VR+E2NR2=

IEN

+

VEN

R2

= VEN _ On

Solving these equations for R1 and R2 we get:

Doc ID 17811 Rev 2

9/17

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