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CS89712-CB

High-Performance, Low-Power System-on-Chip with 10BASE-T Ethernet Controller

Cirrus Logic 

CS89712

• LCD controller interfaces directly to a single-

scan panel monochrome LCD. Panel width size

is programmable from 32 to 1024 pixels in 16-

pixel increments. Video frame buffer size pro-

grammable up to 128 kbytes with 1, 2, or 4 bits

per pixel supports 15-level grayscale operation.

• Programmable frame buffer address allows a

system with only internal SRAM for memory.

• On-chip boot ROM programmed with serial

load boot sequence.

• Two 16-bit general purpose timer counters.

• 32-bit Real-Time Clock and comparator.

• Dedicated LED flasher pin driven from the

RTC with programmable duty ratio (multi-

plexed with a GPIO pin).

• Two 16550 type UARTs:

- support bit rates up to 115.2 kbps

- contain two 16-byte FIFOs for TX and RX

- UART1 supports modem control signals

• Two synchronous serial interfaces for Micro-

wire (128 kbps) or SPI peripherals such as

ADCs, one supporting both master/slave mode

and the other supporting master mode only.

• PWM interface provides two 96 kHz clocks

with programmable 1/16 to 15/16 duty cycle

for driving a DC to DC converter.

• An interface to one or two Cirrus Logic CL-

PS6700 PC Card controller devices to support

two PC Card slots.

• Oscillator and phase-locked loop (PLL) to gen-

erate the core clock speeds of 18.432 MHz,

36.864 MHz, 49.152 MHz, and 73.728 MHz

from an external 3.6864 MHz crystal.

• A low-power 32.768 kHz oscillator.

• Suite of software drivers for immediate use

with most industry standard network operating

systems. In addition, complete evaluation kits

and manufacturing packages significantly re-

duce production cost and time.

• Commercial 0 - 70C operating temperature.

The CS89712 design is optimized for low power

dissipation and is fabricated on a fully static

0.25 micron CMOS process. It is available in a

256-ball PBGA package.

A maximum configured system using the CS89712

is shown in Figure 1. This system assumes all of the

DRAMs and ROMs are 16-bit wide devices. The

keyboard may be connected to more GPIO bits than

shown to allow greater than 64 keys, however these

extra pins will not be wired into the WAKEUP pin

functionality. Note that only one of the CODEC,

SSI2, or DAI interfaces may be used at a time.

6

DS502PP2

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