V58C265164S-5 Ver la hoja de datos (PDF) - Mosel Vitelic, Corp

Número de pieza

componentes Descripción

Lista de partido

V58C265164S-5

64 Mbit DDR SDRAM 2.5 VOLT 4M X 16

Mosel Vitelic, Corp 

MOSEL VITELIC

V58C265164S

Write Interrupted by a Precharge

A Burst Write can be interrupted before completion of the burst by a Precharge command, with the only

restriction being that the interval that separates the commands be at least one clock cycle.

Write Interrupted by a Precharge Timing

(CAS Latency = 2; Burst Length = 8)

T0

T1

T2

T3

T4

T5

T6

T7

T8

T9

T10 T11 T12

CK, CK

Command

DQS

DQ

DM

WriteA NOP

NOP

PreA NOP

tWR

NOP

NOP

NOP

NOP

NOP

NOP

D0 D1 D2 D3 D4 D5

Data is masked

by DM input

Data is masked

by Precharge Command

DQS input ignored

Write with Auto Precharge

If A10 is high when a Write command is issued, the Write with auto Precharge function is performed. Any

new command to the same bank should not be issued until the internal precharge is completed. The internal

precharge begins after keeping tWR (min.).

Write with Auto Precharge Timing

(CAS Latency = Any; Burst Length = 4)

T0

T1

CK, CK

Command

BA NOP

DQS

DQ

T2

T3

tRAS(min)

NOP

WAP

T4

T5

T6

T7

NOP

NOP

NOP

NOP

tWR(min)

D0 D1 D2 D3

T8

T9

tRP(min)

NOP

NOP

T10

BA

Begin Autoprecharge

V58C265164S Rev. 1.7 August 2001

18

Share Link: