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MM1492AF Ver la hoja de datos (PDF) - Mitsumi

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MM1492AF Datasheet PDF : 14 Pages
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MITSUMI
I2C BUS
I2C BUS Controlled 5-Input 2-Output AV Switch MM1492AF
SDA
SCL
S
12345678A123
8A P
S:Start Condition
P:Stop Condition
A:Acknowledge
I2C BUS is inter bus system controled by 2 lines (SDA, SCL).
Data are transmitted and received in the units of byte and Acknowledge.
It is transmitted by MSB first from the Start conditions.
[Control registers]
Control registers are data sent from the master for determining the switch conditions.
The data format is set as shown in the following figure.
Slave address
R/W
Control register 1
Control register 2
S
A
A
AP
1 0 0 1 0 0 0/1 0
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Address byte
Control data
Out of the Address byte, first 7bit are assigned to the slave address, while the residual 1bit is assigned to the
R/W bit.
Set the R/W bit to 0 when data are used control registers.
As MM1492 slave address, either 90H or 92H can be selected according to the ADR terminal conditions.
When ADR terminal is L, 90H is selected.
The following figure indicates the control contents of control registers and switches.
Each bit of control registers is reset to 0, when power-on.
Register
1
2
b7
Audio Gain 1
Audio Gain 2
b6
S/Comp select 1
S/Comp select 2
b5
b4
b3
Video out1 select
Video out2 select
b2
b1
b0
Audio out1 select
Audio out2 select
MM1492 consists of one address byte and two control data bytes (3bytes in total).
All data over the limited length (4th and subsequent bytes) are fully neglected.
For details of the control contents of switches, refer to the separate table.

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