82C55A
Timing Waveforms (Continued)
WR
OBF
tWOB (21)
tAOB (22)
INTR
ACK
OUTPUT
tWIT
(28)
tAK (15)
tWB (12)
FIGURE 28. MODE 1 (STROBED OUTPUT)
tAIT (27)
DATA FROM
CPU TO 82C55A
WR
OBF
INTR
ACK
tWOB
(21)
tAOB
(22)
tAK
(15)
(NOTE)
STB
IBF
PERIPHERAL
BUS
tST
(16)
tSIB
(23)
tPS (17)
(NOTE)
tAD (19)
tKD
(20)
tPH (18)
tRIB (24)
RD
DATA FROM
DATA FROM
PERIPHERAL TO 82C55A
82C55A TO PERIPHERAL
DATA FROM
82C55A TO CPU
FIGURE 29. MODE 2 (BIDIRECTIONAL)
NOTE: Any sequence where WR occurs before ACK and STB occurs before RD is permissible. (INTR = IBF MASK STB RD OBF MASK
ACK WR)
FN2969 Rev 11.00
Dec 8, 2015
Page 21 of 30