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LAN9303I-ABZJ Datasheet PDF : 366 Pages
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Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
2.3.3
Ethernet
Magnetics
LAN9303/
LAN9303i
I2C EEPROM/
I2C
I2C slave
MII
MII
MIIM/
SMI
EEPROM
(optional)
10/100
PHY
Figure 2.2 MII MAC Mode
PHY Mode
PHY mode utilizes an external MAC to provide a network path for the CPU. PHY mode supports MII
and RMII interfaces. The external MII/RMII pins must be connected to an external MAC, providing a
communication path to the Switch Fabric. MII PHY mode can operate at 10, 100, or 200Mbps (Turbo
mode). RMII PHY mode can operate at 10 or 100Mbps. In PHY mode, the device may be SMI
managed or I2C managed as detailed in Section 2.3.4, "Management Modes".
When an EEPROM is connected, the EEPROM loader can be used to load the initial device
configuration from the external EEPROM via the I2C interface. Once operational, if managed, the CPU
can use the I2C interface to read or write the EEPROM.
LAN9303/
LAN9303i
I2C EEPROM/
I2C
I2C slave
MII
MII
MIIM/
SMI
EEPROM
(optional)
10/100
MAC
LAN9303/
LAN9303i
I2C EEPROM/
I2C
I2C slave
RMII
MIIM/
SMI
RMII
EEPROM
(optional)
10/100
MAC
Figure 2.3 MII/RMII PHY Mode
2.3.4 Management Modes
Various modes of management are provided in both MAC and PHY modes of operation. Two separate
interfaces may be used for management: the I2C interface or the SMI/MIIM (Media Independent
Interface Management) slave interface.
The I2C interface runs as an I2C slave. The slave mode is used as a register access path for an
external CPU. The I2C slave and I2C master EEPROM interface are shared interfaces.
The SMI/MIIM interface runs as either an SMI/MIIM slave or MIIM master. The master mode is used
to access an external PHYs registers under CPU control (assuming the CPU is using I2C). The slave
mode is used for register access by the CPU or external MAC and provides access to either the
Revision 1.3 (08-27-09)
20
DATASHEET
SMSC LAN9303/LAN9303i

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