MB86615PFV Ver la hoja de datos (PDF) - Fujitsu

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MB86615PFV

IEEE 1394 Bus Controller (for DVC)

Fujitsu 

MB86615

(4) 80-Series DMA Read Operation

Parameter

DREQ “H” to DACK “L”

RD “H” to DREQ “L”

DACK setup time

DACK hold time

RD “L” level pulse width

RD “H” level pulse width

Data output definition time

Data output disabled time

Symbol

tDHAL

tDHDL

tDARS

tDARH

tDRD

tDRDH

tDRLD

tDRHD

Value

Unit

Min.

Max.

0

—

ns

—

30

ns

20

—

ns

0

—

ns

40

—

ns

30

—

ns

—

40

ns

5

—

ns

DREQ

DACK

RD

D15 to D6, D0

AD5 to AD1

tDHAL

tDARS

tDRD

tDRDH

tDRLD

tDRHD

Defined data

tDHDL

tDARH

Defined data

30

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