74AHC86D Ver la hoja de datos (PDF) - NXP Semiconductors.

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74AHC86D

Quad 2-input EXCLUSIVE-OR gate

NXP Semiconductors. 

Nexperia

5. Pinning information

5.1 Pinning

1A 1

1B 2

1Y 3

2A 4

2B 5

2Y 6

GND 7

74AHC86

74AHCT86

14 VCC

13 4B

12 4A

11 4Y

10 3B

9 3A

8 3Y

001aah083

Fig 4. Pin configuration SO14, TSSOP14

5.2 Pin description

Table 2.

Symbol

1A to 4A

1B to 4B

1Y to 4Y

GND

VCC

Pin description

Pin

1, 4, 9, 12

2, 5, 10, 13

3, 6, 8, 11

7

14

Description

data input

data input

data outputs

ground (0 V)

supply voltage

6. Functional description

Table 3. Function table[1]

Input nA

L

L

H

H

[1] H = HIGH voltage level;

L = LOW voltage level.

Input nB

L

H

L

H

74AHC86; 74AHCT86

Quad 2-input EXCLUSIVE-OR gate

terminal 1

index area

1B 2

1Y 3

2A 4

2B 5

2Y 6

86

GND(1)

13 4B

12 4A

11 4Y

10 3B

9 3A

001aad105

Transparent top view

(1) The die substrate is attached to this pad using

conductive die attach material. It can not be used as

a supply pin or input.

Fig 5. Pin configuration DHVQFN14

Output nY

L

H

H

L

74AHC_AHCT86_2

Product data sheet

Rev. 02 — 15 November 2007

© Nexperia B.V. 2017. All rights reserved

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