74AHC86-Q100 Ver la hoja de datos (PDF) - NXP Semiconductors.
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74AHC86-Q100 Datasheet PDF : 15 Pages
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74AHC86-Q100;
74AHCT86-Q100
Quad 2-input EXCLUSIVE-OR gate
Rev. 1 — 5 June 2013
Product data sheet
1. General description
The 74AHC86-Q100; 74AHCT86-Q100 are high-speed Si-gate CMOS devices and are
pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance
with JEDEC standard no. 7A.
The 74AHC86-Q100; 74AHCT86-Q100 provides a 2-input exclusive-OR function.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accept voltages higher than VCC
For 74AHC86-Q100 only: operates with CMOS input levels
For 74AHCT86-Q100 only: operates with TTL input levels
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AHC86D-Q100
74AHCT86D-Q100
40 C to +125 C
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74AHC86PW-Q100 40 C to +125 C
74AHCT86PW-Q100
TSSOP14
plastic thin shrink small outline package; 14 leads; SOT402-1
body width 4.4 mm
74AHC86BQ-Q100 40 C to +125 C
74AHCT86BQ-Q100
DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1
very thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
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