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74HC640

Octal bus transceiver; 3-state; inverting

NXP Semiconductors. 

Philips Semiconductors

Octal bus transceiver; 3-state; inverting

Product specification

74HC/HCT640

FEATURES

• Octal bidirectional bus interface

• Inverting 3-state outputs

• Output capability: bus driver

• ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT640 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT640 are octal transceivers featuring

inverting 3-state bus compatible outputs in both send and

receive directions.

The “640” features an output enable (OE) input for easy

cascading and a send/receive (DIR) for direction control.

OE controls the outputs so that the buses are effectively

isolated. The “640” is similar to the “245” but has inverting

outputs.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

SYMBOL

PARAMETER

CONDITIONS

tPHL/ tPLH

CI

CI/O

CPD

propagation delay

An to Bn;

Bn to An

input capacitance

input/output capacitance

power dissipation capacitance

per transceiver

CL = 15 pF; VCC = 5 V

notes 1 and 2

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz

fo = output frequency in MHz

∑ (CL × VCC2 × fo) = sum of outputs

CL = output load capacitance in pF

VCC = supply voltage in V

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

TYPICAL

HC HCT

99

UNIT

ns

3.5 3.5 pF

10 10 pF

35 35 pF

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

March 1988

2

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