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AD9216BCPZ-65

10-Bit, 65/80/105 MSPS Dual A/D Converter

Analog Devices 

TERMINOLOGY

Analog Bandwidth

The analog input frequency at which the spectral power of the

fundamental frequency (as determined by the FFT analysis) is

reduced by 3 dB.

Aperture Delay

The delay between the 50% point of the rising edge of the

encode command and the instant the analog input is sampled.

Aperture Uncertainty (Jitter)

The sample-to-sample variation in aperture delay.

Clock Pulse Width/Duty Cycle

Pulse-width high is the minimum amount of time that the

clock pulse should be left in a Logic 1 state to achieve rated

performance; pulse-width low is the minimum time clock pulse

should be left in a low state. At a given clock rate, these

specifications define an acceptable clock duty cycle.

Crosstalk

Coupling onto one channel being driven by a low level (−40

dBFS) signal when the adjacent interfering channel is driven by

a full-scale signal.

Differential Analog Input Resistance, Differential Analog

Input Capacitance, and Differential Analog Input

Impedance

The real and complex impedances measured at each analog

input port. The resistance is measured statically and the

capacitance and differential input impedances are measured

with a network analyzer.

Differential Analog Input Voltage Range

The peak-to-peak differential voltage that must be applied to

the converter to generate a full-scale response. Peak differential

voltage is computed by observing the voltage on a single pin

and subtracting the voltage from the other pin, which is 180°

out of phase. Peak-to-peak differential is computed by rotating

the inputs phase 180° and by taking the peak measurement

again. The difference is then computed between both peak

measurements.

Differential Nonlinearity

The deviation of any code width from an ideal 1 LSB step.

AD9216

Effective Number of Bits (ENOB)

The ENOB is calculated from the measured SINAD based on

the equation (assuming full-scale input)

ENOB = SINADMEASURED − 1.76 dB

6.02

Full-Scale Input Power

Expressed in dBm and computed using the following equation.

⎜⎛ V 2 FULL SCALE rms ⎟⎞

⎜

PowerFULL SCALE = 10 log ⎜

⎜

Z INPUT

0.001

⎟

⎟

⎟

⎜⎝

⎟⎠

Gain Error

The difference between the measured and ideal full-scale input

voltage range of the ADC.

Harmonic Distortion, Second

The ratio of the rms signal amplitude to the rms value of the

second harmonic component, reported in dBc.

Harmonic Distortion, Third

The ratio of the rms signal amplitude to the rms value of the

third harmonic component, reported in dBc.

Integral Nonlinearity

The deviation of the transfer function from a reference line

measured in fractions of 1 LSB using a best straight line

determined by a least square curve fit.

Minimum Conversion Rate

The encode rate at which the SNR of the lowest analog signal

frequency drops by no more than 3 dB below the guaran-

teed limit.

Maximum Conversion Rate

The encode rate at which parametric testing is performed.

Output Propagation Delay

The delay between a 50% crossing of the CLK rising edge and

the time when all output data bits are within valid logic levels.

Rev. A | Page 11 of 40

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