CXB1586AR
3. High-speed ECL differential input
The high-speed ECL differential input pins are biased to VBB (VCC–1.3V) via a 18 kΩ resistor in the IC.
See the figures below for ECL differential input methods.
VCC=3.3V, VEE=GND
VCC=3.3V, VEE=GND
VBB (VCC–1.3V)
3.3V ECL output buffer
160Ω
160Ω
ECL differential input buffer
(a) ECL differential signal from 3.3V ECL output buffer
VCC=GND, VEE=–4.5V
0.01µF
VCC=3.3V, VEE=GND
VBB (VCC–1.3V)
ECL 100K output buffer
330Ω
0.01µF
330Ω
VEE
ECL differential input buffer
(b) ECL differential signal from ECL 100K output buffer
75Ω
TRANS.
LINE
0.01µF
0.01µF
75Ω
75Ω
VCC=3.3V, VEE=GND
VBB (VCC–1.3V)
ECL differential input buffer
(c) differential signal from 75Ω transmission line (AC/DC termination)
75Ω
TRANS.
LINE
0.01µF
0.01µF
75Ω
75Ω
0.01µF
VCC=3.3V, VEE=GND
VBB (VCC–1.3V)
ECL differential input buffer
(d) differential signal from 75Ω transmission line (AC termination)
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