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USB3319C-CP-TR Ver la hoja de datos (PDF) - SMSC -> Microchip

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USB3319C-CP-TR Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Hi-Speed USB Transceiver with 1.8V ULPI Interface - 13MHz Reference Clock
PIN/
BALL
15
C5
16
B4
17
B5
18
A5
19
A4
20
A3
21
B3
22
B2
23
A2
24
A1
FLAG
C3
Table 1 USB3319 Pin Description (continued)
NAME
DATA[2]
DIRECTION/ ACTIVE
TYPE
LEVEL
DESCRIPTION
I/O,
CMOS
N/A ULPI bi-directional data bus.
DATA[1]
I/O,
CMOS
N/A ULPI bi-directional data bus.
DATA[0]
NXT
DIR
STP
VDD1.8
RESETB
REFCLK
I/O,
CMOS
Output,
CMOS
Output,
CMOS
Input,
CMOS
Power
Input,
CMOS,
Input,
CMOS
N/A
High
N/A
High
N/A
Low
N/A
ULPI bi-directional data bus. DATA[0] is
the LSB.
The PHY asserts NXT to throttle the data.
When the Link is sending data to the
PHY, NXT indicates when the current
byte has been accepted by the PHY. The
Link places the next byte on the data bus
in the following clock cycle.
Controls the direction of the data bus.
When the PHY has data to transfer to the
Link, it drives DIR high to take ownership
of the bus. When the PHY has no data to
transfer it drives DIR low and monitors
the bus for commands from the Link.
The Link asserts STP for one clock cycle
to stop the data stream currently on the
bus. If the Link is sending data to the
PHY, STP indicates the last byte of data
was on the bus in the previous cycle.
External 1.8V Supply input pin. This pad
needs to be bypassed with a 0.1uF
capacitor to ground, placed as close as
possible to the USB3319.
When low, the part is suspended with all
of the I/O tri-stated. When high the
USB3319 will operate as a normal ULPI
device.
13MHz Reference Clock input.
RBIAS
GND
Analog,
CMOS
Ground
N/A Bias Resistor pin. This pin requires an
8.06k(±1%) resistor to ground, placed
as close as possible to the USB3319.
N/A Ground.
QFN only: The flag should be connected
to the ground plane with a via array
under the exposed flag. This is the main
ground for the IC.
SMSC USB3319 REV C
7
PRODUCT PREVIEW
Revision 2.1 (06-10-10)

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