TC59(2002) Ver la hoja de datos (PDF) - Microchip Technology
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TC59 Datasheet PDF : 20 Pages
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TC59
4.0 THERMAL CONSIDERATIONS
4.1 Power Dissipation
The amount of power dissipated internal to the low drop
out linear regulator is the sum of the power dissipation
within the linear pass device (P-Channel MOSFET),
and the quiescent current required to bias the internal
reference and error amplifier. The internal linear pass
device power dissipation is calculated multiplying the
voltage across the linear device times the current
through the device. The input and output voltages are
negative for the TC59. The power dissipation is
calculated using the absolute value of the voltage
difference between the input and output voltage.
TABLE 4-1: MAXIMUM POWER
DISSIPATION
Package Type
SOT-23-3
Maximum Power
Dissipation
150mW
EQUATION 4-1:
PD (Pass Device) = (VIN – VOUT) X IOUT
The internal power dissipation as a result of the bias
current for the LDO internal reference and error
amplifier is calculated by multiplying the ground or
quiescent current times the input voltage.
EQUATION 4-2:
PD (Bias) = VIN X IGND
The total internal power dissipation is the sum of
Equation 4-1 and Equation 4-2.
EQUATION 4-3:
PTOTAL = PD (Pass Device) + PD (Bias)
For the TC59, the internal quiescent bias current is so
low (3µA typical), the PD (Bias) term of the power
dissipation equation can be ignored. The maximum
power dissipation can be estimated by using the
maximum input voltage and the minimum output
voltage to obtain a maximum voltage differential
between input and output and multiplying the maximum
voltage differential by the maximum output current.
EQUATION 4-4:
PMAX = (VIN (MAX) – VOUT (MIN)) X IOUT (MAX)
For example, given the following conditions:
VIN
= -7.0V ±5%
VOUT
= -5.0V ±2%
IOUT
= 1mA to 40mA
TAMBIENT (MAX) = 55°C
PMAX
= (7V X (1.05) – (5.0V X 0.98)) X 40mA
PMAX
= 98.0 milli-Watts
To determine the junction temperature of the device,
the thermal resistance from junction to air must be
known. The SOT-23-3 RθJA is estimated to be
approximately 359°C/W when mounted on a 4-layer
board. The RθJA will vary with physical layout, airflow
and other application specific conditions.
The device junction temperature is determined by
calculating the junction temperature rise above
ambient, then adding the rise to the ambient
temperature.
EQUATION 4-5:
JUNCTION
TEMPERATURE
(SOT-23 EXAMPLE)
TJUNCTION = PD (MAX) X RθJA + TAMBIENT
TJUNCTION = 98.0 milli-Watts X 359°C/W + 55°C
TJUNCTION = 90.2°C
DS21438B-page 4
© 2002 Microchip Technology Inc.
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