MK1704A Ver la hoja de datos (PDF) - Integrated Circuit Systems
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MK1704A Datasheet PDF : 4 Pages
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I CR O C LOC K
MK1704A
Low EMI Clock Generator
Pin Assignment
ICLK 1
8 DC
VDD 2
7 S0
GND 3
6 S1
CLK 4
5 LEE
8 pin SOIC
Clock Output Select Table (in MHz)
Input
Freq. spread
S1 S0 Min Nom Max Multiplier Mode
vs. CLK
0 0 60 135 140
x1
*
+0.5, -1.5%
0 1 60 80 120
x1
*
+0.5, -1.5%
1 0 30 40 60
x1
SVGA Down 2.5%
1 1 40 65 100
x1
XGA +0.5, -1.5%
*Note: Use only MK1704A with date code of 9909 or later.
Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
Name
ICLK
VDD
GND
CLK
LEE
S1
S0
DC
Type Description
I Connect to a clock input as shown in the table above.
P Connect to +3.3V or +5V.
P Connect to ground.
O Clock Output; equal to input frequency.
I Low EMI Enable. Turns on the spread spectrum when high. Internal pull-up.
I Frequency Select 1 Input. Selects input/output clock range per table above. Internal pull-up.
I Frequency Select 0 Input. Selects input/output clock range per table above. Internal pull-up.
- Don't Connect. Do not connect anything to this pin.
Key: I = Input, O = output, P = power supply connection
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01µF should be connected between VDD and GND on pins 2 and 3, and a 33 Ω terminating resistor
may be used on the clock output if the trace is longer than 1 inch. The MK1704A is designed for use with a
clock input only. For a crystal input, use the MK1704S or the MK1714-01R.
MDS 1704A B
2
Revision 062599
Printed 11/15/00
MicroClock Division of ICS • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel•(408)295-9818fax
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