UPD720122 Ver la hoja de datos (PDF) - NEC => Renesas Technology

Número de pieza

componentes Descripción

Lista de partido

UPD720122

USB2.0 Generic Device Controller

NEC => Renesas Technology 

µPD720122

Pin Name

I/O

Buffer Type

Active Level

Function

(2/2)

RSDM

O

USB full speed D- O

USB’s full speed D− signal

M(1:0)

VBUS

I

5 V tolerant Input

I

5 V tolerant Input Note

Function mode setting

VBUS monitoring

AVDD, PVDD

VDD

AVSS, PVSS

VSS, GND

NC

3.3 VDD for Analog circuit

3.3 VDD

VSS for Analog circuit

VSS

Not connect

Reserved

Not used

Note

Remark

VBUS pin may be used to monitor for VBUS line even if VDD, AVDD, and PVDD are shut off. System must

ensure that the input voltage level for VBUS pin is less than 3.0 V due to the absolute maximum rating is not

exceeded.

“5 V tolerant“ means that the buffer is 3.3 V buffer with 5 V tolerant circuit.

The operation mode of the BIU can be set by external pins, as shown below. Fix external pins (M1 and M0) when

using them.

Pin

BIU Operation Mode

Outline

M1 M0

00

16-bit mode

(Function 1)

A 16-bit CPU bus and an external local bus dedicated to data transfer for bulk IN/OUT can

be used in this mode. The internal register length is 16 bits.

01

8-bit mode

(Function 2)

Multiplexed bus mode of 8-bit address bus and 8-bit data bus.

The register length is 8 bits only in this mode (registers can only be accessed in byte units).

Therefore, the address space in this mode differs from that in the other modes.

The active levels of some external local bus control pins can be changed by the Active pin.

10

16-bit mix mode

(Function 3)

Multiplexed bus mode of 8-bit address bus and 16-bit data bus.

The internal register length is 16 bits.

The active levels of some external local bus control pins can be changed by the Active pin.

1 1 Setting prohibited Setting prohibited

(Function 4)

10

Data Sheet S16685EJ2V0DS

Share Link: