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RTL8029AS

Realtek PCI Full-Duplex Ethernet Controller with built-in SRAM

Realtek Semiconductor 

RTL8029AS Preliminary

6.3. Local Memory Bus Control

The local memory bus of RTL8029AS is shared by the BROM & 9346 EEPROM.The following

diagram demonstrates their connection relationship.

MD7-0

MD7-0

BOEB

RTL8029AS

EECS

BOEB

MA14-2

MA1 [EEDO]

MA0

BROM

D7-0

A14-0

CE

OE

MA14-0

MA3-1

9346

EESK

EEDI

EEDO

EECS

EECS

Figure 1. Local Memory Bus Block Diagram

6.4. Flow Control

The RTL8029AS supports IEEE802.3X flow control to improve performance in full-duplex

mode. It detects PAUSE packet to achieve flow control task.

6.4.1. Control Frame Transmission

When RTL8029AS detects its free receive buffer less than 3K bytes, it sends a PAUSE

packet with pause_time(=FFFFh) to inform the source station to stop transmission for

the specified period of time. After the driver has processed the packets in the receive

buffer and updated the boundary pointer, the RTL8029AS sends the other PAUSE

packet with pause_time(=0000h) to wake up the source station to restart transmission.

6.4.2. Control Frame Reception

RTL8029AS enters backoff state for the specified period of time when it receives a valid

PAUSE packet with pause_time(=n). If the PAUSE packet is received while

RTL8029AS is transmitting, RTL8029AS starts to backoff after current transmission

completes. RTL8029AS frees to transmit next packets again when it receives a valid

PAUSE packet with pause_time(=0000h) or the backoff timer(=n*51.2us) elapses.

Note: The PAUSE operation cannot be used to inhibit transmission of MAC Control

frames (e.g. PAUSE packet).

LS009.0

28

1997.01.16

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