RTL8100 Ver la hoja de datos (PDF) - Realtek Semiconductor

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RTL8100

SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT

Realtek Semiconductor 

RTL8100B(L)

5.23 Disconnect Counter

(Offset 006Ch-006Dh, R)

Bit

Name

Description/Usage

Default/Attribute

15-0

DCNT

This 16-bit counter increments by 1 for every disconnect event. It

h'[0000],

rolls over when becomes full. It is cleared to zero by read command.

R

5.24 False Carrier Sense Counter

(Offset 006Eh-006Fh, R)

This counter provides information required to implement the “FalseCarriers” attribute within the MAU managed object class of

Clause 30 of IEEE 802.3u specification.

Bit

Name

Description/Usage

Default/Attribute

15-0

FCSCNT This 16-bit counter increments by 1 for each false carrier event. It is

h'[0000],

cleared to zero by read command.

R

5.25 NWay Test Register

(Offset 0070h-0071h, R/W)

Bit

Name

Description/Usage

15-8

-

Reserved

7

NWLPBK 1 = set NWay to loopback mode.

6-4

-

Reserved

3

ENNWLE 1 = LED0 Pin indicates linkpulse

2

FLAGABD 1 = Auto-neg experienced ability detect state

1

FLAGPDF 1 = Auto-neg experienced parallel detection fault state

0

FLAGLSC 1 = Auto-neg experienced link status check state

Default/Attribute

-

0, RW

-

0, RW

0, RO

0, RO

0, RO

5.26 RX_ER Counter

(Offset 0072h-0073h, R)

Bit

Name

Description/Usage

Default/Attribute

15-0

RXERCNT This 16-bit counter increments by 1 for each valid packet received.

h'[0000],

It is cleared to zero by a read command.

R

2001-11-9

29

Rev.1.41

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