TC51WHM516AXBN65 Ver la hoja de datos (PDF) - Toshiba

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TC51WHM516AXBN65

2,097,152-WORD BY 16-BIT CMOS PSEUDO STATIC RAM

Toshiba 

Deep Power-down Timing

CE1

CE2

Power-on Timing

VDD

tCS

VDD min

TC51WHM516AXBN65,70

tDPD

tCH

CE1

tCHC

CE2

tCH

tCHP

Provisions of Address Skew

Read

In case, multiple invalid address cycles shorter than tRCmin sustain over 10µs in a active status, as least one

valid address cycle over tRCmin must be needed during 10µs.

over 10µs

CE1

WE

Address

tRCmin

Write

In case, multiple invalid address cycles shorter than tWCmin sustain over 10µs in a active status, as least one

valid address cycle over tWCmin with tWPmin must be needed during 10µs.

over 10µs

CE1

tWPmin

WE

Address

tWCmin

2002-08-22 8/11

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