PI6C2308 Ver la hoja de datos (PDF) - Pericom Semiconductor
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PI6C2308 Datasheet PDF : 10 Pages
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PI6C2308
3.3V Zero Delay Buffer 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Switching Characteristics for Industrial Temperature Devices(5)
Parameter
Name
Test Conditions
30pF load, All devices
t1
Output Frequency
20pF load, 1H devices
15pF load, 1,2,3,4,6 devices
Duty Cycle(4) = t2 ÷ t1
(1,2,3,4,6)
t2
Measured at 1.4V, FOUT <66.66MHz 30pF load
Measured at 1.4V, FOUT <133 MHz 15pF load
Measured at 1.4V, FOUT <45 MHz 15pF load
Measured at 1.4V, FOUT <66.66MHz 30pF load
Duty Cycle(4) = t2 ÷ t1 (1H)
Measured at 1.4V, FOUT <133 MHz 15pF load
Measured at 1.4V, FOUT <45MHz 30pF load
Rise Time(4) (1,2,3,4)
t3
Measured between 0.8V and 2.0V, 30pF load
Measured between 0.8V and 2.0V, 15pF load
Rise Time(4) (1H)
Measured between 0.8V and 2.0V, 30pF load
Fall Time(4) (1,2,3,4)
t4
Fall Time(4) (1H)
Measured between 0.8V and 2.0V, 30pF load
Measured between 0.8V and 2.0V, 15pF load
Measured between 0.8V and 2.0V, 30pF load
Output to Output Skew on same
Bank (1,2,3,4,6)(4)
t5
Output Bank A to Output Bank B
Skew (1,1H, 4)
All outputs equally loaded
Output Bank A to Output Bank B
Skew (2, 3,6)
t6
Delay, REF Rising Edge to FBK
Rising Edge(4)
Measured at VDD/2
t7
Device to Device Skew(4)
t8
Output Slew Rate(4)
Measured at VDD/2 MHz, on the FBK pins of devices
Measured twx 0.8V & 2.0V on 1H,5 device using Test
Crt #2
Cycle to Cycle Jitter(4),
(1, 1H, 4)
tJ
Cycle to Cycle Jitter(4),
(2,3,6)
Measured at 66.67 MHz, loaded outputs, 30pF Load
Measured at 133 MHz, loaded outputs, 15pF Load
Measured at 66.67 MHz, loaded outputs, 30pF Load
tLOCK PLL Lock Time(4)
Stable power supply, valid clocks presented on REF &
FBK pins
Min. Typ. Max. Units
100
10
134 MHz
134
40.0
60.0
45.0
50.0 55.0 %
45.0
40.0
60.0
45.0
55.0
2.2
1.50
1.50
ns
2.50
1.50
1.25
200
400 ps
0 ±200
600
1
V/ns
200
100 ps
400
1.0 ms
Notes:
1. Weak pull-down.
2. Weak pull-down on all outputs.
3. Weak pull-ups on these inputs.
4. REF and FBK inputs have a threshhold voltage of VDD/2.
5. For definition of t1-8, see Switching Waveforms on page 8.
7
PS8384D 06/26/01
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