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9702-00

3000 MHz UltraCMOS™ Integer-N PLL Rad Hard for Space Applications

Peregrine Semiconductor 

PE9702

Product Specification

Functional Description

The PE9702 consists of a prescaler, counters, a

phase detector, and control logic. The dual

modulus prescaler divides the VCO frequency by

either 10 or 11, depending on the value of the

modulus select. Counters “R” and “M” divide the

reference and prescaler output, respectively, by

integer values stored in a 20-bit register. An

additional counter (“A”) is used in the modulus

select logic. The phase-frequency detector

Figure 4. Functional Block Diagram

generates up and down frequency control signals.

The control logic includes a selectable chip

interface. Data can be written via serial bus,

parallel bus, or hardwired directly to the pins.

There are also various operational and test modes

and a lock detect output.

fr

R Counter

fc

(6-bit)

D(7:0)

Sdata

Control

Pins

Control

Logic

R(5:0)

M(8:0)

A(3:0)

Phase

Detector

Modulus

Select

Fin

10/11

M Counter

Fin

Prescaler

(9-bit)

PD_U

PD_D

LD

Cext

fp

Document No. 70-0036-02 │ www.psemi.com

©2003-2006 Peregrine Semiconductor Corp. All rights reserved.

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