NJG1717KT2 Ver la hoja de datos (PDF) - Japan Radio Corporation

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NJG1717KT2

PHS Transceiver GaAs MMIC

Japan Radio Corporation  

NJG1717KT2

No. SYMBOL

DESCRIPTION

14

VCTL2

Control port. Please connect bypass capacitor C2 with ground plane close to

this terminal.

Common RF port. The terminal PC is connected to the terminal P1 or the

15

PC

terminal P2 by the voltage supplied to the terminal VCTL1 and VCTL2.

In order to block the DC bias voltage of internal circuit, external capacitor C1 is

required.

16

VCTL1

Control port. Please connect bypass capacitor C24 with ground plane close to

this terminal.

RF port. This terminal is one of ports of SPDT SW. This terminal connects to

17

P1

PC terminal (pin 15) when logical low voltage signal is supplied to VCTL2 (pin

14) and logical high voltage signal is supplied to VCTL1 (pin 16). External

capacitor C23 is required to block the DC bias voltage of internal circuit.

Output terminal of power amplifier. The RF signal from power amplifier goes out

through an external matching circuit connected to this terminal. Moreover, this

18

PAOUT terminal should be connected to DC power supply through inductor L9 shown in

the application circuit, since it is the terminal for power supply of the 3rd stage

of Power Amplifier.

This terminal is for DC power supply of the 2nd stage of power amplifier. Please

19

VCC2 place bypass capacitors C17 and C18 between this terminal and GND as near

as possible.

This terminal is for DC power supply of the 1st stage of power amplifier. Please

20

VCC1 place bypass capacitors C15 and C16 between this terminal and GND as near

as possible.

21

GND3 Ground terminal (0V)

22

PAIN RF input terminal of power amplifier. An external matching circuit is required.

This terminal is for base bias supply of the 1st stage of power amplifier.

Operation current of the power amplifier is adjusted by changing the bias

23

VBB1 voltage applied to this terminal. Please connect bypass capacitors C12 and C13

with ground plane close to this terminal. Please connect pin 24 and pin 1, and

connect the resistor R1 for temperature characteristic compensation of PA gain.

This terminal is for base bias supply of the 2nd stage of Power Amplifier.

Operation current of the power amplifier is adjusted by changing the bias

24

VBB2 voltage applied to this terminal. Please connect bypass capacitors C12 and C13

with ground plane close to this terminal. Please connect pin 23 and pin 1, and

connect the resistor R1 for temperature characteristic compensation of PA gain.

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