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IDT71V416YL Ver la hoja de datos (PDF) - Integrated Device Technology

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IDT71V416YL
IDT
Integrated Device Technology IDT
IDT71V416YL Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
3.3V CMOS Static RAM
4 Meg (256K x 16-Bit)
IDT71V416YS
IDT71V416YL
Features
256K x 16 advanced high-speed CMOS Static RAM
JEDEC Center Power / GND pinout for reduced noise.
Equal access and cycle times
– Commercial and Industrial: 10/12/15ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 3.3V power supply
Available in 44-pin, 400 mil plastic SOJ package and a 44-
pin, 400 mil TSOP Type II package and a 48 ball grid array,
9mm x 9mm package.
Functional Block Diagram
Description
The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized
as 256K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs.
The IDT71V416 has an output enable pin which operates as fast as
5ns, with address access times as fast as 10ns. All bidirectional inputs and
outputs of the IDT71V416 are LVTTL-compatible and operation is from a
single 3.3V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71V416 is packaged in a 44-pin, 400 mil Plastic SOJ and a
44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x
9mm package.
Output
OE
Enable
Buffer
A0 - A17
Address
Buffers
Chip
CS
Select
Buffer
Write
WE
Enable
Buffer
BHE
BLE
Byte
Enable
Buffers
©2004 Integrated Device Technology, Inc.
Row / Column
Decoders
4,194,304-bit
Memory
Array
8
8
Sense
16
Amps
and
Write
Drivers
8
8
High
Byte
8
Output
Buffer
High
Byte
8
Write
Buffer
Low
Byte
8
Output
Buffer
Low
Byte
8
Write
Buffer
I/O 1
I/O 8
I/O 7
I/O 0
6442 drw 01
JULY 2004
1
DSC-6442/01

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