M12L64164A-6TA Ver la hoja de datos (PDF) - [Elite Semiconductor Memory Technology Inc.

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M12L64164A-6TA

1M x 16 Bit x 4 Banks Synchronous DRAM

[Elite Semiconductor Memory Technology Inc. 

ESMT

6. Precharge

M12L64164A

Operation temperature condition -25℃ ~ 85℃

1)Normal Write (BL=4)

CLK

CMD

WR

PRE

DQ

D0 D1 D2 D3

tRDL

*Note1

2)Normal Read (BL=4)

CLK

CMD

RD

DQ(CL2)

PRE CL=2

*Note2

Q0 Q1 Q2 Q3

CMD

DQ(CL3)

PRE CL=3

*Note2

Q0 Q1 Q2 Q3

.

7. Auto Precharge

1)Normal Write (BL=4)

2)Normal Read (BL=4)

CLK

CLK

CMD

WR

CMD

RD

DQ

D0 D1 D2 D3

tRDL (min)

DQ(CL2)

*Note3

Auto Precharge starts

DQ(CL3)

D0 D1 D2 D3

D0 D1 D2 D3

*Note3

Auto Precharge starts

*Note :

1. tRDL : Last data in to row precharge delay.

2. Number of valid output data after row precharge : 1,2 for CAS Latency = 2,3 respectively.

3. The row active command of the precharge bank can be issued after tRP from this point.

The new read/write command of other activated bank can be issued from this point.

At burst read/write with auto precharge, CAS interrupt of the same/another bank is illegal.

Elite Semiconductor Memory Technology Inc.

Publication Date: Dec. 2004

Revision: 0.1

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