LTC2190 Ver la hoja de datos (PDF) - Linear Technology
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LTC2190 Datasheet PDF : 28 Pages
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LTC2192
LTC2191/LTC2190
TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
LTC2192
LTC2191
LTC2190
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
fS
Sampling Frequency (Notes 10, 11)
l5
65 5
40 5
25
MHz
tENCL
ENC Low Time (Note 8) Duty Cycle Stabilizer Off
l 7.3 7.69 100 11.88 12.5 100 19 20 100
ns
Duty Cycle Stabilizer On
l 2 7.69 100 2 12.5 100 2 20 100
ns
tENCH
ENC High Time (Note 8) Duty Cycle Stabilizer Off
l 7.3 7.69 100 11.88 12.5 100 19 20 100
ns
Duty Cycle Stabilizer On
l 2 7.69 100 2 12.5 100 2 20 100
ns
tAP
Sample-and-Hold
Acquistion Delay Time
0
0
0
ns
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Digital Data Outputs (RTERM = 100Ω Differential, CL = 2pF to GND On Each Output)
tSER
Serial Data Bit Period 4-Lane Output Mode
2-Lane Output Mode
1-Lane Output Mode
tFRAME
tDATA
tPD
tr
tf
FR to DCO Delay
(Note 8)
l
Data to DCO Delay
(Note 8)
l
Propagation Delay
(Note 8)
l
Output Rise Time
Data, DCO, FR, 20% to 80%
Output Fall Time
Data, DCO, FR, 20% to 80%
DCO Cycle-Cycle Jitter tSER = 1ns
Pipeline Latency
0.35 • tSER
0.35 • tSER
0.7n + 2 • tSER
1/(4 • fS)
1/(8 • fS)
1/(16 • fS)
0.5 • tSER
0.5 • tSER
1.1n + 2 • tSER
0.17
0.17
60
7
Sec
0.65 • tSER
0.65 • tSER
1.5n + 2 • tSER
Sec
Sec
Sec
ns
ns
psP-P
Cycles
SPI Port Timing (Note 8)
tSCK
SCK Period
Write Mode
l
40
Readback Mode,
l
250
CSDO = 20pF, RPULLUP = 2k
tS
CS-to-CLK Setup Time
l
5
tH
SCK-to-CS Setup Time
l
5
tDS
SDI Setup Time
l
5
tDH
SDI Hold Time
l
5
tDO
SCK Falling to SDO
Readback Mode,
l
Valid
CSDO = 20pF, RPULLUP = 2k
ns
ns
ns
ns
ns
ns
125
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND with GND and OGND
shorted (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above VDD, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above VDD without latchup.
Note 4: When these pin voltages are taken below GND they will be
clamped by internal diodes. When these pin voltages are taken above VDD
they will not be clamped by internal diodes. This product can handle input
currents of greater than 100mA below GND without latchup.
Note 5: VDD = OVDD = 1.8V, fSAMPLE = 65MHz (LTC2192), 40MHz
(LTC2191), or 25MHz (LTC2190), 2-lane output mode, differential
ENC+/ENC– = 2VP-P sine wave, input range = 2VP-P with differential drive,
unless otherwise noted.
6
Note 6: Integral nonlinearity is defined as the deviation of a code from a
best fit straight line to the transfer curve. The deviation is measured from
the center of the quantization band.
Note 7: Offset error is the offset voltage measured from –0.5LSB when
the output code flickers between 0000 0000 0000 0000 and 1111 1111
1111 1111 in 2’s complement output mode.
Note 8: Guaranteed by design, not subject to test.
Note 9: VDD = OVDD=1.8V, fSAMPLE = 65MHz (LTC2192),
40MHz (LTC2191), or 25MHz (LTC2190), 2-lane output mode,
ENC+ = single‑ended 1.8V square wave, ENC– = 0V, input range = 2VP-P
with differential drive, unless otherwise noted. The supply current and
power dissipation specifications are totals for the entire IC, not per
channel.
Note 10: Recommended operating conditions.
Note 11: The maximum sampling frequency depends on the speed grade
of the part and also which serialization mode is used. The maximum serial
data rate is 1000Mbps, so tSER must be greater than or equal to 1ns.
219210p
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