CS5342_06 Ver la hoja de datos (PDF) - Cirrus Logic
Número de pieza
componentes Descripción
Lista de partido
CS5342_06 Datasheet PDF : 21 Pages
| |||
CS5342
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 4
SPECIFIED OPERATING CONDITIONS ............................................................................................... 4
ABSOLUTE MAXIMUM RATINGS ......................................................................................................... 4
ANALOG CHARACTERISTICS (CS5342-CZZ) ..................................................................................... 5
DIGITAL FILTER CHARACTERISTICS ................................................................................................. 6
DC ELECTRICAL CHARACTERISTICS ................................................................................................ 9
DIGITAL CHARACTERISTICS ............................................................................................................... 9
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT ............................................................... 10
2. PIN DESCRIPTION .............................................................................................................................. 12
3. TYPICAL CONNECTION DIAGRAM ................................................................................................... 13
4. APPLICATIONS ................................................................................................................................... 14
4.1 Single-, Double-, and Quad-Speed Modes ..................................................................................... 14
4.2 Operation as Either a Clock Master or Slave ................................................................................. 14
4.2.1 Operation as a Clock Master ................................................................................................. 15
4.2.2 Operation as a Clock Slave ................................................................................................... 15
4.2.3 Master Clock ......................................................................................................................... 16
4.3 Serial Audio Interface ..................................................................................................................... 16
4.4 Power-Up Sequence ...................................................................................................................... 17
4.5 Analog Connections ....................................................................................................................... 17
4.6 Grounding and Power Supply Decoupling ...................................................................................... 17
4.7 Synchronization of Multiple Devices ............................................................................................... 17
4.8 Capacitor Size on the Reference Pin (FILT+) ................................................................................ 17
5. PARAMETER DEFINITIONS ................................................................................................................ 19
6. PACKAGE DIMENSIONS ................................................................................................................... 20
THERMAL CHARACTERISTICS .......................................................................................................... 20
7. ORDERING INFORMATION ................................................................................................................ 21
8. REVISION HISTORY ............................................................................................................................ 21
LIST OF FIGURES
Figure 1.Single-Speed Stopband Rejection ................................................................................................ 7
Figure 2.Single-Speed Stopband Rejection (detail) .................................................................................... 7
Figure 3.Single-Speed Transition Band (detail) .......................................................................................... 7
Figure 4.Single-Speed Passband Ripple .................................................................................................... 7
Figure 5.Double-Speed Stopband Rejection ............................................................................................... 7
Figure 6.Double-Speed Stopband Rejection (detail) ................................................................................... 7
Figure 7.Double-Speed Transition Band (detail) ......................................................................................... 8
Figure 8.Double-Speed Passband Ripple ................................................................................................... 8
Figure 9.Quad-Speed Stopband Rejection ................................................................................................. 8
Figure 10.Quad-Speed Stopband Rejection (detail) ................................................................................... 8
Figure 11.Quad-Speed Transition Band (detail) ......................................................................................... 8
Figure 12.Quad-Speed Passband Ripple ................................................................................................... 8
Figure 13.Master Mode, Left-Justified SAI ................................................................................................ 11
Figure 14.Slave Mode, Left-Justified SAI .................................................................................................. 11
Figure 15.Master Mode, I²S SAI ................................................................................................................ 11
Figure 16.Slave Mode, I²S SAI .................................................................................................................. 11
Figure 17.Typical Connection Diagram ..................................................................................................... 13
Figure 18.CS5342 Master Mode Clocking ................................................................................................ 15
Figure 19.Left-Justified Serial Audio Interface .......................................................................................... 16
Figure 20.I²S Serial Audio Interface .......................................................................................................... 16
Figure 21.CS5342 Recommended Analog Input Buffer ............................................................................ 17
Figure 22.CS5342 THD+N versus Frequency .......................................................................................... 18
2
DS608F1
Share Link: 