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74F20SC

Dual 4-Input NAND Gate

Fairchild Semiconductor 

April 1988

Revised July 1999

74F20

Dual 4-Input NAND Gate

General Description

This device contains two independent gates, each of which

performs the logic NAND function.

Ordering Code:

Order Number Package Number

Package Description

74F20SC

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

74F20SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74F20PC

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

IEEE/IEC

Unit Loading/Fan Out

Pin Names Description

An, Bn, Cn, Dn

On

Inputs

Outputs

U.L.

HIGH/LOW

1.0/1.0

50/33.3

Input IIH/IIL

Output IOH/IOL

20 µA/−0.6 mA

−1 mA/20 mA

© 1999 Fairchild Semiconductor Corporation DS009462

www.fairchildsemi.com

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